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Design of digital down converter and...
~
Ecole Polytechnique, Montreal (Canada).
Design of digital down converter and digital predistortor for predistortion linearizated amplifiers.
紀錄類型:
書目-電子資源 : 單行本
正題名/作者:
Design of digital down converter and digital predistortor for predistortion linearizated amplifiers./
作者:
Li, Jing.
面頁冊數:
84 p.
附註:
Source: Masters Abstracts International, Volume: 43-06, page: 2347.
Contained By:
Masters Abstracts International43-06.
標題:
Engineering, Electronics and Electrical. -
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=MR01357
ISBN:
9780494013571
Design of digital down converter and digital predistortor for predistortion linearizated amplifiers.
Li, Jing.
Design of digital down converter and digital predistortor for predistortion linearizated amplifiers.
- 84 p.
Source: Masters Abstracts International, Volume: 43-06, page: 2347.
Thesis (M.Sc.A.)--Ecole Polytechnique, Montreal (Canada), 2005.
Power amplifiers (PAs) in the third-generation (3G) wireless communication systems are becoming a bottleneck, which prevents the system to work in a high efficiency condition since the modulation scheme of the system requires very high linearity. Hence, various linearization methods have been presented to improve the linearity of the power amplifier so as to increase the efficiency of the communication system. The predistortion technique is one of the most promising linearization techniques, which is attracting attention of more and more researcher over the world. Taking advantage of high speed FPGA+DSP, the baseband digital predistortion is a cost-effective means with wide bandwidth and a superior linearization performance, and more, predistortion does not significantly compromise the efficiency of an amplifier.
ISBN: 9780494013571Subjects--Topical Terms:
170927
Engineering, Electronics and Electrical.
Design of digital down converter and digital predistortor for predistortion linearizated amplifiers.
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Source: Masters Abstracts International, Volume: 43-06, page: 2347.
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Thesis (M.Sc.A.)--Ecole Polytechnique, Montreal (Canada), 2005.
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Power amplifiers (PAs) in the third-generation (3G) wireless communication systems are becoming a bottleneck, which prevents the system to work in a high efficiency condition since the modulation scheme of the system requires very high linearity. Hence, various linearization methods have been presented to improve the linearity of the power amplifier so as to increase the efficiency of the communication system. The predistortion technique is one of the most promising linearization techniques, which is attracting attention of more and more researcher over the world. Taking advantage of high speed FPGA+DSP, the baseband digital predistortion is a cost-effective means with wide bandwidth and a superior linearization performance, and more, predistortion does not significantly compromise the efficiency of an amplifier.
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The main objective of this thesis is to design a baseband digital predistortion system for linearizing RF power amplifiers of W-CDMA base station. In detail, the thesis concentrates on designing and implementing following modules: Baseband Digital Pre-Distorter (DPD), Dual-channel Mixer (down converter) and IF Amplifier, Digital Demodulator (DDEM). (Abstract shortened by UMI.)
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