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On-chip communication performance im...

Kim, Man-ho.

On-chip communication performance improvement by using network technology.

紀錄類型:	書目-電子資源 : 單行本
正題名/作者:	On-chip communication performance improvement by using network technology./
作者:	Kim, Man-ho.
面頁冊數:	96 p.
附註:	Source: Dissertation Abstracts International, Volume: 69-01, Section: B, page: 0550.
Contained By:	Dissertation Abstracts International69-01B.
標題:	Engineering, Electronics and Electrical. -
電子資源:	Download PDF (下載PDF全文)
ISBN:	9780549405146

On-chip communication performance improvement by using network technology.
Kim, Man-ho.

On-chip communication performance improvement by using network technology. - 96 p.

Source: Dissertation Abstracts International, Volume: 69-01, Section: B, page: 0550.

Thesis (Ph.D.)--University of Minnesota, 2008.

Designing a flexible on-chip communication network, which provides the bandwidth required for a target application and which can be reused for other applications, is a key issue in chip design. Network-on-Chip (NoC) methodology, which uses packet switched communication techniques from computer networks for on-chip network design, is a promising solution for future complex system-on-chip design. In this thesis, a Code Division Multiple Access (CDMA) based on-chip switch architecture, which adapts the modulation/demodulation method from wireless communication to the on-chip level, is presented and analyzed for emerging NoC applications. The modulation and demodulation algorithms for the on-chip communication environment are presented. The cost and the performance of switch implementation are given. An adaptive scheduling scheme for a CDMA-based NoC switch is presented. We show that it provides efficient use of codewords and has arbitration fairness. We also develop an efficient buffer architecture, thereby minimizing the router overhead. In particular, an efficient virtual output queued buffer which includes a shared backup buffer for NoC application is given. Realistic traffic rates between the cores are used to determine the performance of the CDMA-based NoC platform and comparisons are given with a traditional mesh topology and crossbar switches. Mapping of an MPEG-4 process as well as traffic generation techniques for multimedia applications are presented. Development of a promising Quality-of-Service (QoS) solution by applying the MultiProtocol Label Switching (MPLS) technology of large-scale computer networks is presented. A network simulator is used to evaluate the performance obtained by modeling a communications scenario which must support several classes of traffic having a range of QoS requirements. Finally, physical level interconnections in an NoC are analyzed. Two distinct classes of wires are considered, namely links between adjacent routers and links between a router and an attached processing element (PE). Analytical models for global router-to-router links and semi-global router-to-PE links are studied. Power and performance optimizations are obtained for each of these two classes of interconnections.

ISBN: 9780549405146Subjects--Topical Terms:

170927
Engineering, Electronics and Electrical.

On-chip communication performance improvement by using network technology.
LDR:03175nmm 2200265 4500 001 1000005098
005 20081017121312.5
008 081017s2008 ||||||||||||||||| ||eng d
020 $a 9780549405146
035 $a (UMI)AAI3295690
035 $a AAI3295690
040 $a UMI $c UMI{me_controlnum}
100 1 $a Kim, Man-ho. $3 1000006324
245 1 0 $a On-chip communication performance improvement by using network technology.
300 $a 96 p.
500 $a Source: Dissertation Abstracts International, Volume: 69-01, Section: B, page: 0550.
500 $a Adviser: Gerald E. Sobleman.
502 $a Thesis (Ph.D.)--University of Minnesota, 2008.
520 $a Designing a flexible on-chip communication network, which provides the bandwidth required for a target application and which can be reused for other applications, is a key issue in chip design. Network-on-Chip (NoC) methodology, which uses packet switched communication techniques from computer networks for on-chip network design, is a promising solution for future complex system-on-chip design. In this thesis, a Code Division Multiple Access (CDMA) based on-chip switch architecture, which adapts the modulation/demodulation method from wireless communication to the on-chip level, is presented and analyzed for emerging NoC applications. The modulation and demodulation algorithms for the on-chip communication environment are presented. The cost and the performance of switch implementation are given. An adaptive scheduling scheme for a CDMA-based NoC switch is presented. We show that it provides efficient use of codewords and has arbitration fairness. We also develop an efficient buffer architecture, thereby minimizing the router overhead. In particular, an efficient virtual output queued buffer which includes a shared backup buffer for NoC application is given. Realistic traffic rates between the cores are used to determine the performance of the CDMA-based NoC platform and comparisons are given with a traditional mesh topology and crossbar switches. Mapping of an MPEG-4 process as well as traffic generation techniques for multimedia applications are presented. Development of a promising Quality-of-Service (QoS) solution by applying the MultiProtocol Label Switching (MPLS) technology of large-scale computer networks is presented. A network simulator is used to evaluate the performance obtained by modeling a communications scenario which must support several classes of traffic having a range of QoS requirements. Finally, physical level interconnections in an NoC are analyzed. Two distinct classes of wires are considered, namely links between adjacent routers and links between a router and an attached processing element (PE). Analytical models for global router-to-router links and semi-global router-to-PE links are studied. Power and performance optimizations are obtained for each of these two classes of interconnections.
590 $a School code: 0130.
650 4 $a Engineering, Electronics and Electrical. $3 170927
690 $a 0544
710 2 $a University of Minnesota. $3 1000005565
773 0 $t Dissertation Abstracts International $g 69-01B.
790 1 0 $a Sobleman, Gerald E., $e advisor
790 $a 0130
791 $a Ph.D.
792 $a 2008
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3295690 $z Download PDF (下載PDF全文)