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System synthesis for image processin...
~
Ko, Dong-Ik.
System synthesis for image processing applications.
紀錄類型:
書目-電子資源 : 單行本
正題名/作者:
System synthesis for image processing applications./
作者:
Ko, Dong-Ik.
面頁冊數:
211 p.
附註:
Source: Dissertation Abstracts International, Volume: 67-03, Section: B, page: 1602.
Contained By:
Dissertation Abstracts International67-03B.
標題:
Engineering, Electronics and Electrical. -
電子資源:
Download PDF (下載PDF全文)
ISBN:
9780542617188
System synthesis for image processing applications.
Ko, Dong-Ik.
System synthesis for image processing applications.
- 211 p.
Source: Dissertation Abstracts International, Volume: 67-03, Section: B, page: 1602.
Thesis (Ph.D.)--University of Maryland, College Park, 2006.
Over the past few decades, embedded systems have been widely infiltrated into our daily lives. Prominent examples are cellular phones, personal digital assistants, digital television set-top boxes, web-pads, and mp3 players. New kinds of embedded devices are being introduced continually for various purposes.
ISBN: 9780542617188Subjects--Topical Terms:
170927
Engineering, Electronics and Electrical.
System synthesis for image processing applications.
LDR
:03776nmm 2200337 4500
001
1000004876
005
20070601084716.5
008
070601s2006 eng d
020
$a
9780542617188
035
$a
(UnM)AAI3212565
035
$a
AAI3212565
040
$a
UnM
$c
UnM{me_controlnum}
100
1
$a
Ko, Dong-Ik.
$3
1000006010
245
1 0
$a
System synthesis for image processing applications.
300
$a
211 p.
500
$a
Source: Dissertation Abstracts International, Volume: 67-03, Section: B, page: 1602.
500
$a
Adviser: Shuvra S. Bhattacharyya.
502
$a
Thesis (Ph.D.)--University of Maryland, College Park, 2006.
520
$a
Over the past few decades, embedded systems have been widely infiltrated into our daily lives. Prominent examples are cellular phones, personal digital assistants, digital television set-top boxes, web-pads, and mp3 players. New kinds of embedded devices are being introduced continually for various purposes.
520
$a
Embedded systems have different combinations and prioritizations of objectives and constraints for their proper design. With the increasing complexity in application functionality, implementation constraints, and optimization objectives, more effective techniques for modeling embedded applications, and for systematically synthesizing implementations become more and more desirable on one hand, and more and more challenging on the other.
520
$a
In this thesis, we focus on the efficient design, implementation, and synthesis of signal processing applications, which form a broad and important class of embedded systems. We place special emphasis in the thesis on the signal processing domain on image processing, a sector that has seen rapidly increasing demand in recent years, but for which present techniques for signal processing design are often lacking in modeling and optimization capability.
520
$a
In this thesis, we propose novel models and algorithms for streamlining scheduling, memory management, and interprocessor communication in embedded multiprocessor implementations of signal processing applications, with the aforementioned emphasis on the image processing domain.
520
$a
For application modeling, we propose two novel modeling techniques called blocked dataflow (BLDF) and dynamic graph topology (DGT). These modeling approaches capture within their respective formal frameworks the structure of block-based image processing operations and reconfigurable, multi-mode dataflow behaviors, respectively.
520
$a
For scheduling, we develop a novel intermediate representation called the pipeline decomposition tree (PDT). The PDT provides efficient representation and analysis of alternative multiprocessing configurations for signal processing applications. We also develop an algorithm, called pipeline decomposition tree scheduling (PDT scheduling), which applies the PDT to systematically derive optimized multiprocessor schedules that employ coarse-grained (task-level) pipelining, which is an especially useful form of parallelism for signal processing. To optimize interprocessor communication, we develop two novel post-optimization techniques for hardware resource mapping and software synthesis.
520
$a
The suite of techniques presented in this thesis address image processing system optimization at key phases in the design process and lead to significant improvements in performance, cost, and predictability of implementations that are derived from them.
590
$a
School code: 0117.
650
4
$a
Engineering, Electronics and Electrical.
$3
170927
690
$a
0544
710
2 0
$a
University of Maryland, College Park.
$3
1000005512
773
0
$t
Dissertation Abstracts International
$g
67-03B.
790
1 0
$a
Bhattacharyya, Shuvra S.,
$e
advisor
790
$a
0117
791
$a
Ph.D.
792
$a
2006
856
4 0
$u
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3212565
$z
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