Logic-timing simulation and the degr...
Bellido, Manuel J.,1964-

 

  • Logic-timing simulation and the degradation delay model /
  • Record Type: Language materials, printed : Monograph/item
    Title/Author: Logic-timing simulation and the degradation delay model // Manuel J. Bellido, Jorge Juan, Manuel Valencia.
    Author: Bellido, Manuel J.,
    other author: Juan, Jorge.
    Published: London :Imperial College Press,c2006.
    Description: xvii, 267 p. :ill. ;24 cm.
    Subject: Computer simulation. -
    ISBN: 1860945899 (hbk.) :
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  • 1 records • Pages 1 •
 
E05841 六樓西文書庫 (6th Floor-Western Books) 一般借閱 外文書 * 003.3 B443 2006 一般(Normal) On shelf 0 5030000-0950003
  • 1 records • Pages 1 •
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